The present invention relates to forming features in the manufacturing of microelectronic devices. More specifically, the present invention relates to the fabrication of low resistance ohmic conductive components on a microelectronic substrate.
Microelectronic devices are used in computers, communications equipment, televisions and many other products. Typical microelectronic devices include processors, memory devices, field emission displays and other devices that have circuits with small, complex components. In current manufacturing processes, the components of such circuits are generally formed on a microelectronic substrate or wafer with conductive, insulative and semiconductive materials. Each mircoelectronic substrate typically has 50-200 microelectronic devices, and each microelectronic device may have several million components.
Because fabricating microelectronic devices generally involves forming electrical components at a number of layers and different locations, microelectronic devices generally have many conductive features to couple the various components together. Common conductive features in microelectronic devices include low resistance ohmic contacts, vias, runners, damascene lines, plugs, dual-damascene lines and other highly conductive components. The ohmic conductive components are formed in openings formed in an insualting layer which covers a base layer. The base layer is often a silicon wafer, and the insulating layer often takes the form of an oxide, such as a silicon oxide.
Currently, a multi-step, multi-chamber process has been used to form ohmic conductive components on microelectronic substrates. In the first step, a conductor, such as titanium, is deposited on a microelectronic substrate. The conductor is deposited so as to make contact with a base layer of the microelectronic substrate wherever a hole or opening has been formed in an insulating layer overlying the base layer. A variety of methods may be employed for depositing the conductor, although chemical vapor deposition (CVD) is typically used. The deposition takes place in a process chamber. The conductor is deposited at wafer temperatures of between 550 and 625xc2x0 C. In the second step, the microelectronic substrate is transferred to a furnace for annealing. Annealing is most often accomplished by rapid thermal processing (RTP). Rapid thermal processing involves a short time, high temperature technique wherein the microelectronic substrate is heated using radiant light. The microelectronic substrate is usually thermally isolated so that radiant, rather than conductive heating and cooling, is dominant. The temperature in rapid thermal processing will exceed 675xc2x0 C., annealing the conductor and the base layer and thus forming the ohmic conductive component in the hole or opening. Most of the heating in RTP takes place in a substantially non-oxidizing atmosphere. Often, nitrogen and argon are the components of the atmosphere. Heating may also take place in a vacuum.
The multi-chamber process presents several problems. The microelectronic substrate is exposed to contamination when transferred between chambers. The contamination may take the form of oxygen, water vapor or other contaminates. Exposure to contamination can be reduced by transferring the microelectronic substrate in an inert atmosphere, however this can be a time consuming and costly process. The microelectronic substrate is also potentially exposed to static electricity which can ruin the substrate. The transfer between chambers causes the microelectronic substrate to cool between the deposition and annealing steps. Cooling results in an increase in manufacturing costs since additional energy must be supplied to reheat the substrate. Cooling may also lead to poor contact formation due to the thermal expansion and contraction of the contact or via between steps.
A single step or a single chamber process for the fabrication of low resistance ohmic conductive components would greatly increase the efficiency of microelectronic device fabrication, both in terms of the cost and in terms of the quantity which can be produced in a given time. Applicants have recognized that one solution would be a single step/single chamber process in which a conductor is deposited by chemical vapor deposition onto a microelectronic substrate having a substrate temperature greater than 675xc2x0 C. While this improves the efficiency of the fabrication process, substrate temperatures approaching 675xc2x0 C. are difficult to achieve due to physical constraints of existing hardware. The substrate temperature is dependent upon the conduction of heat from a heated substrate holder, which also known in the industry as a susceptor. The susceptor would have to be driven to temperatures of 700xc2x0 C. and above to achieve sufficiently high substrate temperatures to anneal the conductor with the base layer. Current susceptor hardware designs are incapable of being driven to such high temperatures.
Applicants have solved the problem by heating a microelectronic substrate in a chamber to a substrate temperature of between approximately 550xc2x0 C. and approximately 625xc2x0 C., depositing a conductor, such as titanium, by for example, chemical vapor deposition (CVD), onto the heated microelectronic substrate and into an opening formed in an insulating layer thereof, and raising the pressure of an ambient or atmosphere in the chamber. The pressure of the atmosphere may be raised until either: (i) the pressure is equal to or greater than approximately 100 Torr; (ii) a silicide forms on the microelectronic substrate; or, (iii) the substrate temperature is at least equal to approximately 675xc2x0 C.
The pressure in the chamber may initially be between a vacuum and atmospheric pressure. A substantially non-oxidizing environment should be provided within the chamber. The atmosphere in the chamber may thus consist substantially of gases such as ammonia, nitrogen, argon or a combination of nitrogen and argon, or any other non-oxidizing gas. The pressure in the chamber is then raised by introducing an additional quantity of non-oxidizing gas into the chamber. The introduction of additional gas rapidly raises the substrate temperature to above 675xc2x0 C. and anneals the conductor deposited on the microelectronic substrate. The annealing causes the conductor deposited on a base layer through the opening in the insulating layer, to form a silicide, such as titanium silicide (TiSi2). Thus a low resistance ohmic contact or via is formed in a single chamber without RTP or furnace annealing.
The use of nitrogen, or a gas containing nitrogen, to pressurize the chamber provides the additional benefit of forming a passivation layer on the surface of the microelectronic substrate. The titanium and nitrogen gas interact to form a thin layer of titanium nitride (TiN) on the microelectronic substrate surface. The passivation layer prevents the growth of oxides, such as titanitum oxides, on the microelectronic substrate.
Preferably the process is performed in a single chamber, although a multiple chamber approach may be employed. In a multiple chamber approach, the microelectronic substrate should be transferred from the first chamber to a second chamber in either a vacuum or a substantially non-oxidizing atmosphere to prevent oxides from forming before the anneal.